Random access memory devices have been made by using flip-flops incorporating at least a pair of cross-coupled transistors. A flip-flop has two stable states and provides the ability to store one bit of information in binary form. Arrays of flip-flops can be addressed in a random access fashion and have been found useful as static random access memories in various types of digital systems. One disadvantage of random access memories formed out of flip-flops is that at least two cross-coupled transistors are necessary in each storage location. When such random access memories are formed as integrated structures, because at least two transistors are necessary for each storage location, the packing density which can be achieved with this technology is correspondingly limited. Additionally, the process of forming the transistors is relatively complex.
As an alternate to static random access memories incorporating flip-flops as discussed above, dynamic memory units have been formed using shift registers. In dynamic memory units, charge is stored for a predetermined period of time on a capacitor. At the end of that time interval the charge is shifted to an adjacent capacitor. The charge moves along a sequential string of capacitors from one to the next at predetermined clock intervals. When a given packet of charge has reached the end of the shift register it can be sensed and/or fed back into the other end of the register so that the corresponding bit of information will recirculate.
Dynamic storage units can be formed with a higher packing density than can static units of the type discussed above. However, dynamic memory units must generate control and clock pulses whose function is to shift the charge, corresponding to the information, sequentially from one capacitor to the next. Additionally, the amount of information that can be stored per unit area in an integrated memory unit of this type is limited by the number of stages which can be connected together in the shift register. This is in turn limited by both the size of the capacitors that can be integrated into the device and the device area occupied by the circuitry which generates the necessary clock pulses. In addition, dynamic shift registers are not randomly addressable. Information can only be accessed when it is shifted to the end of the shift register. This inability to randomly address information stored in a register can be undesirable in many types of applications.